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RTL Buddy

RTL Buddy gives RTL projects one command surface for simulation, regressions, synthesis, formal verification, physical design, coverage, and debug tooling.

Projects describe models, tests, and flows in YAML. RTL Buddy resolves filelists, invokes external tools, records artefacts, and reports consistent results for local, CI, and agent-driven runs.

Supported workflows​

  • Simulation and randomized testing with Verilator, Icarus Verilog, or VCS
  • Multi-suite regressions with local, local-parallel, or Slurm dispatch
  • Yosys synthesis and OpenROAD timing, place-and-route, and power analysis
  • SymbiYosys formal verification and mutation testing
  • Verilator coverage collection, merge, query, and export
  • Surfer waveform viewing and RTL hierarchy queries
  • Verible linting, spec traceability, FPGA implementation, and AXI profiling
  • Machine-readable output, a design knowledge graph, and an MCP server for agents

External tools are installed per workflow. See Installation for the supported integrations.

Start here​

  • Installation — install RTL Buddy and the tools your workflow needs
  • Quick Start — run an existing test, regression, or synthesis entry
  • Root Config — configure platforms and tools
  • Tests — define and run a verification suite

Reference​